Optoelectronic devices play a crucial role in applications ranging from data communications to consumer electronics, as well as to devices for developing applications, such as optical computing. The ability to manufacture optoelectronic devices efficiently is of critical importance in reaching the low cost targets required for making the devices acceptable for use in such applications. In particular, it is desirable to fabricate as many devices as possible during a single manufacturing process to reduce manufacturing costs. For example, it is highly desirable to fabricate a plurality of devices in parallel at different regions of a wafer. However, fabrication of multiple devices on a single wafer can often make it difficult to test the devices on the wafer before the devices are singulated, because the optical output/input from a first device on the wafer may be blocked by a second device on the wafer, making it difficult for a testing device to receive the optical output/input. The testing of singulated devices, however, can add an unacceptable cost to the fabrication of optoelectronic devices, since each device must be manipulated and tested individually. Therefore, there is a need in the art for technology that would permit wafer-level testing of a plurality of optoelectronic devices.